EP20K200EFC484-2N vs EP20K200FC484-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200EFC484-2N sa pamamagitan ng Intel at EP20K200FC484-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200EFC484-2N | EP20K200FC484-1 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX-20KE | APEX 20K |
| Product Type | FPGA - Field Programmable Gate Array | — |
| System Gates | 200,000 | 200 K |
| Logic Elements | 8,320 | — |
| Total RAM Bits | 106,496 | — |
| Embedded System Blocks (ESB) | 52 (True Dual-Port RAM) | — |
| Maximum User I/O | 376 | — |
| Packhaging | 484-FBGA (FineLine BGA), 23x23 mm, 1.0 mm pitch | 484-ball FBGA (FineLine BGA) |
| Core Voltage | 1.8 V | — |
| Supply Voltage Range | 1.71 V to 1.89 V | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Logic Family | CMOS | — |
| Propagation Delay (typ.) | 2.5 ns | — |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | 0 °C to 85 °C (Commercial) |
| Configuration Modes | Passive Serial, Passive Parallel Async, JTAG | — |
| PLLs | 4 | — |
| Speed Grade | -2 | -1 (fastest bin) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Logic Elements / Cells | — | 8320 |
| Embedded Memory (RAM bits) | — | 106,496 bits |
| Number of I/Os | — | 382 |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| Core Supply Voltage | — | 2.5 V |
| Maximum Operating Frequency | — | 250 MHz |
| Propagation Delay | — | 2.5 ns |
| Architecture | — | MultiCore (LUT + Embedded System Blocks) |
| Programming Interface | — | IEEE 1149.1 JTAG |