EP20K200EFI484-2X vs EP20K200EFC484-2N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200EFI484-2X sa pamamagitan ng Intel at EP20K200EFC484-2N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200EFI484-2X | EP20K200EFC484-2N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KE | APEX-20KE |
| Series | EP20K200E | — |
| System Gates | 200,000 | 200,000 |
| Logic Elements | 8,320 | 8,320 |
| Embedded RAM Bits | 106,496 | — |
| User I/O Pins | 376 | — |
| Maximum Frequency | 205 MHz | — |
| Core Voltage | 1.8 V | 1.8 V |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Propagation Delay | 1.97 ns | — |
| Packhaging | 484-ball FineLine BGA | 484-FBGA (FineLine BGA), 23x23 mm, 1.0 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Temperature na Operasyon | -40 °C to +100 °C (TJ) | 0 °C to +85 °C (Commercial) |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| Configuration Interface | JTAG (IEEE 1149.1) + Serial/Parallel PROM | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+ (per APEX 20KE family datasheet) | — |
| Product Type | — | FPGA - Field Programmable Gate Array |
| Total RAM Bits | — | 106,496 |
| Embedded System Blocks (ESB) | — | 52 (True Dual-Port RAM) |
| Maximum User I/O | — | 376 |
| Supply Voltage Range | — | 1.71 V to 1.89 V |
| Logic Family | — | CMOS |
| Propagation Delay (typ.) | — | 2.5 ns |
| Configuration Modes | — | Passive Serial, Passive Parallel Async, JTAG |
| PLLs | — | 4 |
| Speed Grade | — | -2 |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |