EP20K200RC208-3 vs EP20K200RC208-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200RC208-3 sa pamamagitan ng Intel at EP20K200RC208-3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K200RC208-3N - APEX 20K FPGA 200K Gates 8320 Cells 167MHz | Altera
EP20K200RC208-3N ObsoletePagsanggunian na paghahambing
| Parametro | EP20K200RC208-3 | EP20K200RC208-3N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX 20K | APEX 20K |
| Family | APEX-20K® | APEX-20K |
| Logic Elements / Cells | 8,320 | — |
| Total System Gates | 200,000 | — |
| Embedded Memory (bits) | 106,496 | — |
| Number of I/O Pins | 144 | — |
| Packhaging | 208-RQFP Exposed Pad (BFQFP) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Process Technology | 0.22 µm CMOS | 0.22 um CMOS |
| Core Voltage | 1.8 V | — |
| I/O Standard | LVDS (3.3 V / 2.5 V) | — |
| Maximum Operating Frequency | 167 MHz | 167 MHz |
| PLLs | 4 | — |
| Speed Grade | -3 | — |
| Temperature na Operasyon | -40°C to +85°C (Industrial) | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| In-System Programmable | Yes | — |
| Hot Socketing | Yes | — |
| Tindminan RoHS | Compliant | — |
| Logic Elements | — | 8320 cells |
| System Gates | — | 200,000 |
| Embedded Memory | — | 106,496 bits |
| User I/O Pins | — | 144 |
| Dedicated Inputs | — | 4 |
| Core Supply Voltage | — | 2.5 V |
| I/O Standard Support | — | LVDS, 1.8V APEX-20KE family |
| Package Type | — | 208-RQFP / BFQFP with exposed pad |
| Terminal Pitch | — | 0.5 mm |
| Hanay ng Temperature na Operasyon | — | 0C to +85C (industrial) |
| Propagation Delay | — | 3.6 ns |
| Architecture | — | MultiCore (LUT + product-term + embedded memory) |