EP20K300EBC652-1 vs EP20K400BC652-1XVQ Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K300EBC652-1 sa pamamagitan ng Altera at EP20K400BC652-1XVQ sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K300EBC652-1 - APEX 20KE 300K Gates FPGA, 652-BGA | Altera
EP20K300EBC652-1 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K300EBC652-1 | EP20K400BC652-1XVQ |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | APEX 20KE | APEX 20K |
| Series | APEX-20KE® | — |
| Number of Logic Elements / Cells | 11520 | — |
| Total RAM Bits | 147456 | — |
| Number of Gates | 300000 | — |
| Number of I/O | 408 | — |
| Voltage - Supply | 1.71 V to 1.89 V | — |
| Temperature na Operasyon | 0C to +85C (industrial range varies) | -40C to +85C (industrial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Packhaging / Kaso | 652-BGA (45x45 mm) | — |
| Supplier Device Package | 652-BGA | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Operating Frequency (max) | [DATA_NEEDED: confirm from datasheet typical perf] | — |
| LVDS Support | Yes (per APEX 20KE family specification) | — |
| In-System Programmable | Yes (JTAG via ByteBlasterMV/MasterBlaster) | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS compliance status] |
| Maximum System Gates | — | 1,052,000 |
| Typical Gates | — | 400,000 |
| Logic Elements | — | 21,600 |
| Embedded Memory Bits | — | 212,992 |
| Maximum User I/O Pins | — | 488 |
| Supply Voltage Core | — | 1.8 V |
| I/O Standard Support | — | LVDS, LVTTL, LVCMOS, PCI, HSTL, SSTL |
| Packhaging | — | 652-ball BGA |
| Speed Grade | — | -1 (slowest) |
| Configuration Interface | — | JTAG (IEEE 1149.1) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |