EP20K300EFC672-1 vs EP20K300EBC652-1X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K300EFC672-1 sa pamamagitan ng Altera at EP20K300EBC652-1X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K300EBC652-1X - APEX 20KE FPGA 300K Gates 11520 Cells 1.8V 652-BGA | Altera
EP20K300EBC652-1X ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K300EFC672-1 | EP20K300EBC652-1X |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | APEX 20KE | — |
| Product Type | FPGA (Field-Programmable Gate Array) | — |
| System Gates | 300,000 | 300,000 |
| Logic Elements | 11,520 | — |
| Embedded RAM Bits | 147,456 | — |
| User I/O | 408 | — |
| Packhaging | 672-ball FineLine BGA | — |
| Process Technology | 0.22 um CMOS | 0.22 um CMOS |
| Core Supply Voltage | 1.8 V (1.71 V min, 1.89 V max) | 1.71 V to 1.89 V |
| Propagation Delay | 1.68 ns | — |
| Internal Frequency | 160 MHz (max performance grade up to 400 MHz) | — |
| Temperature na Operasyon | 0 C to 85 C (commercial) | — |
| I/O Standards Supported | LVCMOS, LVTTL, PCI, GTL+, SSTL-2/3, LVDS | — |
| Architecture | MultiCore (LUT + ESB) | MultiCore (LUT + product-term + embedded memory) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Logic Family | CMOS, SRAM-based | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS compliance status] |
| Series | — | APEX 20KE |
| Device Family | — | Apex 20KE (1.8V, LVDS) |
| Logic Elements (Cells) | — | 11,520 |
| Total RAM Bits | — | 147,456 |
| Maximum User I/O | — | 408 |
| Number of Gates | — | 300K |
| Operating Frequency | — | 400 MHz |
| Packhaging / Kaso | — | 652-BGA (45 mm x 45 mm) |
| Supplier Device Package | — | 652-BGA |