EP20K300EFI672-2X vs EP20K400FI672-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K300EFI672-2X sa pamamagitan ng Intel at EP20K400FI672-2X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K300EFI672-2X | EP20K400FI672-2X |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | APEX 20KE | APEX 20K |
| System Gates | 300,000 | — |
| Logic Elements (Cells) | 11,520 | — |
| Embedded Memory | 147,456 bits | 212,992 bits |
| User I/Os | 408 | — |
| Maximum Internal Frequency | 350 MHz | — |
| Propagation Delay | 1.68 ns | — |
| Core Supply Voltage | 1.8 V | — |
| Process Technology | 0.22 µm CMOS | 0.18 um CMOS, 6-metal |
| Packhaging | 672-ball FineLine BGA (FBGA) | 672-ball BGA (FI672) |
| Package Pin Count | 672 | — |
| Temperature na Operasyon | -40 °C to +85 °C (industrial) | -40C to +85C (industrial) |
| Uri ng Pagpapasok | Surface Mount | — |
| Speed Grade | -2X (enhanced) | -2X |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Logic Elements | — | 16,640 |
| Typical Gates | — | 400,000 system gates |
| User I/O Pins | — | 496 |
| Package Code | — | BGA |
| Terminal Form | — | Ball |
| No. of Terminals | — | 672 |
| Package Shape | — | Square |
| Core Voltage | — | 1.8 V |
| I/O Voltage Support | — | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) |
| Configuration Method | — | SRAM (serial EPROM or JTAG) |
| JTAG Support | — | Yes (IEEE 1149.1) |