EP20K300EQC240-3 vs EP20K300EQC240-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K300EQC240-3 sa pamamagitan ng Intel at EP20K300EQC240-2X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K300EQC240-3 | EP20K300EQC240-2X |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX-20KE | APEX 20KE (MultiCore) |
| Typical Gates | 300,000 | — |
| Logic Elements / Cells | 11,520 | 11,520 |
| Embedded Memory (bits) | 147,456 | — |
| Maximum User I/O | 152 | — |
| Number of PLLs | 4 | — |
| Speed Grade | -3 | — |
| Core Voltage (VCCINT) | 1.8 V | 1.71 V to 1.89 V (1.8 V nominal) |
| I/O Voltage Tolerance | 2.5V / 3.3V / 5.0V compatible | — |
| Packhaging | 240-pin PQFP / BFQFP (240-BFQFP) | — |
| Pin Pitch | 1.0 mm | — |
| Terminal Form | Gull Wing | Gull Wing |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +85C (commercial) | 0 °C to 85 °C |
| Programmable Logic Type | Loadable PLD | — |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| Process Technology | 0.22 um CMOS | — |
| Configuration Interface | JTAG (IEEE 1149.1), passive serial | — |
| Tindminan RoHS | [DATA_NEEDED: confirm for this date code] | [DATA_NEEDED: RoHS status] |
| Series | — | APEX 20KE |
| System Gates | — | 300,000 |
| Macrocells | — | 1,152 |
| User I/Os | — | 152 |
| Number of Terminals | — | 240 |
| Logic Family | — | CMOS |
| Propagation Delay | — | 1.68 ns (2.29 ns per alternate source listing) |
| Internal Operating Frequency | — | Up to 160 MHz |
| Packhaging / Kaso | — | 240-BQFP (240-PQFP, 32x32 mm) |
| Supplier Device Package | — | 240-PQFP (32x32) |
| Package Code | — | FQFP |
| Programmability | — | In-system programmable (JTAG) |