EP20K30EQC208-2 vs EP20K30EQC208-3 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K30EQC208-2 sa pamamagitan ng Intel at EP20K30EQC208-3 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K30EQC208-2 EP20K30EQC208-3
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Family APEX 20KE —
Device Logic FPGA (SRAM-based) —
Typical Gates 30,000 —
Logic Elements 1,200 —
Embedded Memory (RAM bits) 24,576 —
Maximum User I/O 125 —
Dedicated Inputs 4 —
Packhaging 208-BFQFP (PQFP-208) 208-BFQFP (PQFP, 28x28 mm)
Speed Grade -2 (2.69 ns pin-to-pin) -3
Core Supply Voltage 1.71 V to 1.89 V —
I/O Standard LVDS-compatible, 1.8 V / 2.5 V / 3.3 V (per bank) —
Maksimum na Taktiko ng Oras 160 MHz —
Propagation Delay 2.69 ns —
Configuration Interface IEEE 1149.1 JTAG, Passive serial, Active serial —
Temperature na Operasyon [DATA_NEEDED: operating temperature range] -40C to +85C
Process Technology 1.8 V CMOS, MultiCore architecture —
Uri ng Pagpapasok Surface Mount (PQFP with gull-wing leads) Surface Mount
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] Compliant (per Rochester listing)
Level ng MSL [DATA_NEEDED: MSL rating] —
Series — APEX-20KE
Core Voltage Supply — 1.71 V to 1.89 V
Total Logic Elements — 1200
Total Gates — 30000
Total RAM Bits — 24576
User I/O Count — 125
Number of LABs/CLBs — 120
Operating Frequency (Max) — 435 MHz
Technology Process — 0.22 µm CMOS
Bilang ng Pins — 208
Programming Interface — JTAG (IEEE 1149.1)

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