EP20K30ETC144-3N vs EP20K30EFC144-1N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K30ETC144-3N sa pamamagitan ng Altera at EP20K30EFC144-1N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K30ETC144-3N - 30K Gates APEX-20KE FPGA, 144-TQFP | Altera/Intel
EP20K30ETC144-3N ⚠ Huling Pagbili
Pagsanggunian na paghahambing
| Parametro | EP20K30ETC144-3N | EP20K30EFC144-1N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | APEX-20KE | — |
| Series | APEX 20K | APEX-20KE |
| Logic Elements | 1200 | 1,200 |
| System Gates | 30000 | — |
| Embedded RAM Bits | 24576 | — |
| Macrocells | 192 | — |
| User I/Os | 92 | 93 (per Mouser/Kynix listing); 408 (per alternate datasheet listing - see note) |
| Packhaging | 144-pin TQFP (TQFP-144 / ETQFP144) | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Voltage | 1.8 V | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) | — |
| Propagation Delay (pin-to-pin) | 1.68 ns (speed grade -3) | — |
| Internal Performance | 435 MHz (per legacy datasheet) | — |
| Temperature na Operasyon | 0 °C to +85 °C (commercial, 'N' suffix) | 0 °C to 85 °C (commercial, N suffix) |
| Uri ng Pagpapasok | Surface Mount (gull-wing) | Surface Mount |
| Tindminan RoHS | Compliant (per legacy Altera declaration) | Unknown - not stated in verified sources |
| Lead-Free | Yes | — |
| Device Family | — | APEX-20K MultiCore (LUT + Product-Term + ESB) |
| Gates | — | 30,000 |
| Embedded SRAM Bits | — | 24,576 |
| Package Type | — | 144-pin FineLine BGA (FBGA) |
| Internal Frequency (max) | — | 160 MHz |
| Propagation Delay | — | 1.68 ns |
| Logic Family | — | CMOS |
| Core Technology | — | 0.22 µm CMOS, SRAM-based configuration |
| Supply Voltage (Core) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Configuration Interface | — | IEEE 1149.1 JTAG + serial configuration (external EPCx required) |