EP20K400BC652-1V vs EP20K400EBC652-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400BC652-1V sa pamamagitan ng Altera at EP20K400EBC652-2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K400EBC652-2 - APEX-20KE 400K Gates FPGA, 488 I/O | Intel / Altera
EP20K400EBC652-2 ObsoletePagsanggunian na paghahambing
| Parametro | EP20K400BC652-1V | EP20K400EBC652-2 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX-20KC | APEX-20KE |
| Family | APEX 20K | APEX 20K |
| Device Sub-Family | EP20K400 | — |
| System Gates | 1,052,000 | — |
| Maximum Logic Elements | 212,992 | — |
| Macrocells / LABs | 16640 | — |
| Embedded Memory (bits) | 212,992 | — |
| Maximum User I/O | 502 | — |
| Speed Grade | -1 | — |
| Clock-to-Output (Tco) | 2.5 ns | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V | — |
| Packhaging | 652-BGA (FineLine, 45 x 45 mm) | 652-BGA (45x45 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to 85C |
| Configuration | SRAM-based, JTAG IEEE 1149.1 | — |
| Architecture | MultiCore (LUT + product-term + ESB) | MultiCore (LUT + Embedded System Blocks) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: rohs status from datasheet] |
| Logic Elements / Macros | — | 1664 macros |
| Total Gates | — | 400,000 gates |
| User I/Os | — | 488 |
| Total RAM Bits | — | 212,992 bits |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V |
| Propagation Delay | — | 2.5 ns |
| Ball Count | — | 652 |
| Logic Family | — | CMOS |