EP20K400BC652-1X vs EP20K400EBC652-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400BC652-1X sa pamamagitan ng Intel at EP20K400EBC652-2X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K400BC652-1X - APEX 20KE FPGA 400K Gates 652-BGA | Intel
EP20K400BC652-1X ⚠ Huling PagbiliAltera
EP20K400EBC652-2X - 400K Gates APEX-20KE FPGA 652-BGA | Altera/Intel
EP20K400EBC652-2X ObsoletePagsanggunian na paghahambing
| Parametro | EP20K400BC652-1X | EP20K400EBC652-2X |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Series | APEX 20KE | APEX-20KE |
| Family | APEX 20K | APEX 20K |
| Logic Elements / Cells | 16,640 | 16,640 |
| System Gates | 400,000 | — |
| Embedded Memory (bits) | 212,992 | — |
| Embedded Array Blocks (EABs) | 104 x 2,048 bits | — |
| Maximum User I/O | 502 | — |
| Dedicated Inputs | 4 | — |
| PLLs | 4 | — |
| DLLs | 4 | — |
| Maximum Frequency | 250 MHz | — |
| Propagation Delay (pin-to-pin) | 2.5 ns | — |
| Core Voltage | 2.5 V | — |
| Process Technology | 0.22 um CMOS | 0.22 µm CMOS |
| I/O Standard Support | LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS | — |
| Packhaging | 652-ball PBGA (45 x 45 mm, 1.27 mm pitch) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status not stated in retrieved snippets] | [DATA_NEEDED: RoHS status] |
| Temperature na Operasyon | Industrial (per datasheet) | 0 °C to +85 °C |
| Total RAM Bits | — | 212,992 |
| Number of Macros | — | 1,664 |
| Number of User I/O | — | 488 |
| Supply Voltage (Core) | — | 1.8 V |
| Supply Voltage (I/O) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-voltage) |
| Operating Frequency (max) | — | 223 MHz |
| Propagation Delay | — | 2.5 ns |
| Number of PLLs | — | 4 |
| Package Type | — | 652-BGA |
| Package Dimensions | — | 45 × 45 mm |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Configuration Interface | — | JTAG / Passive Serial / ByteBlaster |