EP20K400BC652-2V vs EP20K400BC652-1V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400BC652-2V sa pamamagitan ng Altera at EP20K400BC652-1V sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400BC652-2V | EP20K400BC652-1V |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX-20KC | APEX-20KC |
| Family | APEX 20K | APEX 20K |
| Total System Gates | 1,052,000 (max) | — |
| Typical Gates | 400,000 | — |
| Logic Elements | 16,640 | — |
| Total RAM Bits | 212,992 | — |
| Number of Logic Cells/Elements | 16,640 | — |
| Number of I/O | 502 max user I/O | — |
| Number of Gates | 400,000 | — |
| Voltage - Supply (Core) | 1.71 V to 1.89 V | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Packhaging / Kaso | 652-BGA (45x45 mm) | — |
| Supplier Device Package | 652-BGA | — |
| Process Technology | 0.22 µm CMOS | — |
| Speed Grade | -2V | -1 |
| Temperature na Operasyon | Industrial (per -2V suffix) | 0C to +85C (commercial) |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS compliance] |
| Device Sub-Family | — | EP20K400 |
| System Gates | — | 1,052,000 |
| Maximum Logic Elements | — | 212,992 |
| Macrocells / LABs | — | 16640 |
| Embedded Memory (bits) | — | 212,992 |
| Maximum User I/O | — | 502 |
| Clock-to-Output (Tco) | — | 2.5 ns |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 2.5 V |
| Packhaging | — | 652-BGA (FineLine, 45 x 45 mm) |
| Configuration | — | SRAM-based, JTAG IEEE 1149.1 |
| Architecture | — | MultiCore (LUT + product-term + ESB) |