EP20K400BC652-3 vs EP20K400BI652-2V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400BC652-3 sa pamamagitan ng Intel at EP20K400BI652-2V sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K400BI652-2V - 400K Gates APEX 20K FPGA 652-BGA | Intel / Altera
EP20K400BI652-2V ObsoletePagsanggunian na paghahambing
| Parametro | EP20K400BC652-3 | EP20K400BI652-2V |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20K | APEX 20K |
| Logic Elements | 16,640 | 16,640 |
| Macro Cells | 1,664 | — |
| Embedded Memory (bits) | 212,992 | 212,992 |
| Maximum User I/Os | 502 | — |
| Number of I/O Banks | 8 | — |
| Supply Voltage (Core) | 2.5 V | — |
| Propagation Delay | 3.6 ns | 2.5 ns (typical) |
| Process Technology | CMOS | 0.22 μm |
| Packhaging | BGA-652 (BC652) | 652-ball FineLine BGA (35 × 35 mm, 1.27 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Temperature na Operasyon | 0 C to +85 C | 0 °C to +85 °C (industrial, "I") |
| Speed Grade | -3 | — |
| Configuration Interface | JTAG (IEEE 1149.1), ByteBlaster | JTAG (IEEE 1149.1) / Passive Serial |
| Design Software | Quartus II (legacy) | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs_status] |
| Series | — | APEX 20K (EPLD-based SOPC) |
| System Gates | — | 400,000 |
| Maximum User I/O | — | 502 |
| Embedded Memory Blocks | — | ESBs (Embedded System Blocks) |
| Macros (per Mouser listing) | — | 1664 |
| Logic Family | — | CMOS |
| Core Supply Voltage (VCCINT) | — | 2.5 V |
| Internal Performance | — | 200 MHz (speed grade -2) |