EP20K400BI652-2V vs EP20K400BI652-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400BI652-2V sa pamamagitan ng Intel at EP20K400BI652-2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K400BI652-2V - 400K Gates APEX 20K FPGA 652-BGA | Intel / Altera
EP20K400BI652-2V Obsolete
Pagsanggunian na paghahambing
| Parametro | EP20K400BI652-2V | EP20K400BI652-2 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | APEX 20K | APEX 20K |
| Series | APEX 20K (EPLD-based SOPC) | APEX-20KC |
| System Gates | 400,000 | 400000 |
| Logic Elements | 16,640 | — |
| Maximum User I/O | 502 | — |
| Embedded Memory (bits) | 212,992 | — |
| Embedded Memory Blocks | ESBs (Embedded System Blocks) | — |
| Macros (per Mouser listing) | 1664 | — |
| Logic Family | CMOS | — |
| Process Technology | 0.22 μm | 0.22 µm CMOS |
| Core Supply Voltage (VCCINT) | 2.5 V | — |
| Propagation Delay | 2.5 ns (typical) | — |
| Internal Performance | 200 MHz (speed grade -2) | — |
| Temperature na Operasyon | 0 °C to +85 °C (industrial, "I") | [DATA_NEEDED: operating temperature grade] |
| Packhaging | 652-ball FineLine BGA (35 × 35 mm, 1.27 mm pitch) | 652-BGA (45 x 45 mm) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: RoHS compliance] |
| Configuration Interface | JTAG (IEEE 1149.1) / Passive Serial | — |
| Logic Elements / Cells | — | 16640 |
| Total RAM Bits | — | 212992 |
| Number of Logic Array Blocks (LABs) | — | 502 |
| User I/O Count | — | 502 (max per family) |
| Number of I/O Banks | — | 8 |
| Core Voltage | — | 1.71 V to 1.89 V |
| I/O Voltage Reference | — | 2.5 V (LVDS support) |
| Maximum Frequency | — | 200 MHz |
| Pin-to-Pin Delay (Tpd) | — | 3.1 ns |