EP20K400CB652C8N vs EP20K400CB652I9 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CB652C8N sa pamamagitan ng Intel at EP20K400CB652I9 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400CB652C8N | EP20K400CB652I9 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Device Logic Elements | 16640 | — |
| System Gates | 400000 | 400,000 |
| Process Technology | 0.15 um CMOS, all-layer copper | 0.15 um CMOS |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Supply Voltage | 2.5 V | — |
| User I/Os | 502 | — |
| Programmable I/O Lines | 488 | — |
| Inputs | 484 | — |
| Outputs | 480 | — |
| Propagation Delay | 2.5 ns | — |
| Internal Operating Frequency | 301.21 MHz | — |
| Packhaging | BGA-652 | 652-pin LBGA (CB) |
| Logic Family | CMOS | — |
| Temperature na Operasyon | 0 C to +85 C | -40C to +85C (industrial, 'I' grade) |
| PCI Support | PCI Local Bus 2.2, 33/66 MHz, 32/64-bit | — |
| Memory Support | DDR SDRAM, ZBT SRAM | — |
| Architecture | MultiCore (LUT + embedded system blocks) | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS compliance verification] |
| Logic Elements | — | 16,640 cells |
| Maximum User I/O | — | 488 |
| Embedded Memory Bits | — | 212,992 bits |
| Embedded System Blocks (ESBs) | — | 104 |
| Core Voltage | — | 1.8 V |
| Maximum Frequency | — | 250 MHz |
| Maximum Seated Height | — | 1.63 mm |
| Speed Grade | — | -9 |
| Total Terminals | — | 652 |