EP20K400CB652C9N vs EP20K400CB652I9 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CB652C9N sa pamamagitan ng Intel at EP20K400CB652I9 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400CB652C9N | EP20K400CB652I9 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Series | EP20K400 | — |
| Device Type | Programmable Logic Device (SOPC FPGA) | — |
| Architecture | MultiCore (LUT logic + Embedded System Blocks) | — |
| System Gates | 400,000 | 400,000 |
| Logic Elements | 16,640 | 16,640 cells |
| Maximum User I/Os | 502 | — |
| Total Memory Bits | 212,992 (per chip) | — |
| Maximum Internal Frequency | 250 MHz | — |
| Propagation Delay | 2.0 ns | — |
| Logic Family | CMOS | — |
| Core Process Technology | 0.15 µm all-layer copper CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V | — |
| Hanay ng Temperature na Operasyon | 0 °C to +85 °C (Commercial) | — |
| Packhaging | BGA-652 (Plastic Ball Grid Array, 652 balls) | 652-pin LBGA (CB) |
| Uri ng Pagpapasok | Surface Mount | — |
| Configuration Interface | IEEE 1149.1 JTAG, serial passive parallel async | — |
| Tindminan RoHS | Unknown (legacy Altera part - verify with distributor) | [DATA_NEEDED: RoHS compliance verification] |
| Maximum User I/O | — | 488 |
| Embedded Memory Bits | — | 212,992 bits |
| Embedded System Blocks (ESBs) | — | 104 |
| Process Technology | — | 0.15 um CMOS |
| Core Voltage | — | 1.8 V |
| Maximum Frequency | — | 250 MHz |
| Maximum Seated Height | — | 1.63 mm |
| Temperature na Operasyon | — | -40C to +85C (industrial, 'I' grade) |
| Speed Grade | — | -9 |
| Total Terminals | — | 652 |