EP20K400CB652I7 vs EP20K400CB652C8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CB652I7 sa pamamagitan ng Altera at EP20K400CB652C8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400CB652I7 | EP20K400CB652C8N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Device Family | Field-Programmable Gate Array (FPGA) | — |
| Typical Gates | 400,000 | — |
| Logic Elements (LEs) | 16,640 | — |
| Maximum Operating Frequency | 375.94 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 um CMOS, all-layer copper |
| Core Supply Voltage | 1.8 V | 1.8 V (1.71 V to 1.89 V) |
| I/O Supply Voltage | 1.8 V / 3.3 V | 2.5 V |
| Packhaging | BGA-652 (652-ball) | BGA-652 |
| Package Code (JESD-30) | S-PBGA-B652 | — |
| Terminal Form | Ball | — |
| Package Shape | Square | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O] | — |
| Embedded Memory | Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM | — |
| Configuration Method | SRAM + JTAG (ISP) | — |
| Speed Grade | 7 | — |
| Temperature Grade | Industrial (-40 °C to +100 °C) | — |
| Tindminan RoHS | Non-compliant (JESD-609 e0, contains lead) | unknown |
| Manufacturer Status | Obsolete (Intel/Altera legacy FPGA) | — |
| Device Logic Elements | — | 16640 |
| System Gates | — | 400000 |
| User I/Os | — | 502 |
| Programmable I/O Lines | — | 488 |
| Inputs | — | 484 |
| Outputs | — | 480 |
| Propagation Delay | — | 2.5 ns |
| Internal Operating Frequency | — | 301.21 MHz |
| Logic Family | — | CMOS |
| Temperature na Operasyon | — | 0 C to +85 C |
| PCI Support | — | PCI Local Bus 2.2, 33/66 MHz, 32/64-bit |
| Memory Support | — | DDR SDRAM, ZBT SRAM |
| Architecture | — | MultiCore (LUT + embedded system blocks) |