EP20K400CB652I7 vs EP20K600CB652C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CB652I7 sa pamamagitan ng Altera at EP20K600CB652C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400CB652I7 | EP20K600CB652C7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Device Family | Field-Programmable Gate Array (FPGA) | — |
| Typical Gates | 400,000 | — |
| Logic Elements (LEs) | 16,640 | — |
| Maximum Operating Frequency | 375.94 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS (all-layer copper interconnect) |
| Core Supply Voltage | 1.8 V | — |
| I/O Supply Voltage | 1.8 V / 3.3 V | — |
| Packhaging | BGA-652 (652-ball) | 652-ball BGA |
| Package Code (JESD-30) | S-PBGA-B652 | — |
| Terminal Form | Ball | — |
| Package Shape | Square | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O] | — |
| Embedded Memory | Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM | — |
| Configuration Method | SRAM + JTAG (ISP) | — |
| Speed Grade | 7 | C7 |
| Temperature Grade | Industrial (-40 °C to +100 °C) | — |
| Tindminan RoHS | Non-compliant (JESD-609 e0, contains lead) | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer Status | Obsolete (Intel/Altera legacy FPGA) | — |
| Series | — | APEX 20K |
| System Gates | — | 600,000 |
| Logic Elements | — | 24,320 |
| Embedded RAM | — | 311,296 bits |
| User I/O Count | — | 488 |
| Core Voltage | — | 1.8 V |
| I/O Voltage Support | — | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) |
| Maximum Frequency | — | 375.94 MHz |
| Architecture | — | MultiCore (LUT + embedded memory) |
| Temperature na Operasyon | — | Commercial (0C to +70C) |