EP20K400CB652I8N vs EP20K400CB652I9 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CB652I8N sa pamamagitan ng Altera at EP20K400CB652I9 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400CB652I8N | EP20K400CB652I9 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 16,640 | 16,640 cells |
| System Gates | 400,000 | 400,000 |
| Macrocells | 1664 | — |
| Number of User I/O | 488 | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Number of Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | — |
| Number of PLLs | 4 | — |
| Embedded Memory (Max) | [DATA_NEEDED: total embedded memory bits] | — |
| Maximum Operating Frequency | 301.21 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 um CMOS |
| Core Voltage | 1.8 V | 1.8 V |
| I/O Voltage (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Operating Temperature (Industrial) | -40°C to +100°C | — |
| Speed Grade | 8 | -9 |
| Packhaging | 652-pin BGA | 652-pin LBGA (CB) |
| Uri ng Pagpapasok | Surface Mount | — |
| Configuration Interface | JTAG / Passive Serial | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS compliance verification] |
| Lead-Free | unknown | — |
| Design Tool | Altera Quartus II (APEX 20KC support) | — |
| Maximum User I/O | — | 488 |
| Embedded Memory Bits | — | 212,992 bits |
| Embedded System Blocks (ESBs) | — | 104 |
| Maximum Frequency | — | 250 MHz |
| Maximum Seated Height | — | 1.63 mm |
| Temperature na Operasyon | — | -40C to +85C (industrial, 'I' grade) |
| Total Terminals | — | 652 |