EP20K400CF672C-7 vs EP20K300EFC672-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CF672C-7 sa pamamagitan ng Altera at EP20K300EFC672-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400CF672C-7 | EP20K300EFC672-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX-20KC | APEX 20KE |
| Logic Elements (LE) | 16640 | — |
| Embedded Memory Bits | 212992 | — |
| Maximum User I/O | 488 | — |
| Number of PLLs | 4 | — |
| Number of Logic Array Blocks (LABs) | 1664 | — |
| Number of ESBs (Embedded System Blocks) | 212 | — |
| Number of CAM Blocks | 16 | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Process Technology | 0.15 µm CMOS, SRAM-based | 0.22 um CMOS |
| Packhaging | 672-pin FC-FBGA (FineLine BGA) | 672-ball FineLine BGA |
| Speed Grade | -7 (commercial) | — |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0 C to 85 C (commercial) |
| Uri ng Pagpapasok | Surface Mount (SMD/SMT) | Surface Mount (BGA) |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free / RoHS status] | — |
| PCI Support | PCI 2.2 compliant, 64-bit / 66 MHz | — |
| Configuration Modes | PS, PPA, PPS, JTAG | — |
| External Memory Support | DDR SDRAM, ZBT SRAM | — |
| Product Type | — | FPGA (Field-Programmable Gate Array) |
| System Gates | — | 300,000 |
| Logic Elements | — | 11,520 |
| Embedded RAM Bits | — | 147,456 |
| User I/O | — | 408 |
| Core Supply Voltage | — | 1.8 V (1.71 V min, 1.89 V max) |
| Propagation Delay | — | 1.68 ns |
| Internal Frequency | — | 160 MHz (max performance grade up to 400 MHz) |
| I/O Standards Supported | — | LVCMOS, LVTTL, PCI, GTL+, SSTL-2/3, LVDS |
| Architecture | — | MultiCore (LUT + ESB) |
| Logic Family | — | CMOS, SRAM-based |
| Tindminan RoHS | — | unknown |