EP20K400CF672C-7 vs EP20K400CF672C-8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CF672C-7 sa pamamagitan ng Altera at EP20K400CF672C-8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400CF672C-7 | EP20K400CF672C-8 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX-20KC | APEX 20K |
| Logic Elements (LE) | 16640 | — |
| Embedded Memory Bits | 212992 | — |
| Maximum User I/O | 488 | 488 |
| Number of PLLs | 4 | — |
| Number of Logic Array Blocks (LABs) | 1664 | — |
| Number of ESBs (Embedded System Blocks) | 212 | — |
| Number of CAM Blocks | 16 | — |
| Core Voltage (VCCINT) | 1.8 V | 1.8 V nominal (1.71 V to 1.89 V) |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V (MultiVolt) | [DATA_NEEDED: VCCIO options] |
| Process Technology | 0.15 µm CMOS, SRAM-based | 0.15 µm all-layer copper CMOS |
| Packhaging | 672-pin FC-FBGA (FineLine BGA) | — |
| Speed Grade | -7 (commercial) | -8 |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | — |
| Uri ng Pagpapasok | Surface Mount (SMD/SMT) | Surface Mount (BGA) |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free / RoHS status] | — |
| PCI Support | PCI 2.2 compliant, 64-bit / 66 MHz | — |
| Configuration Modes | PS, PPA, PPS, JTAG | — |
| External Memory Support | DDR SDRAM, ZBT SRAM | — |
| Logic Elements | — | 16,640 |
| Typical Gates | — | 400,000 |
| Macros | — | 1,664 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Package Type | — | PBGA-672 (FineLine BGA, 27 x 27 mm, 1.0 mm pitch) |
| Pin-to-Pin Delay (tPD) | — | 1.78 ns (speed grade -8) |
| Temperature Grade (C) | — | Commercial, 0 °C to 85 °C |
| Embedded Memory Type | — | ESB (RAM / ROM / CAM) |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Passive Parallel |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS compliance] |