EP20K400CF672C9N vs EP20K400CF672C8ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CF672C9N sa pamamagitan ng Intel at EP20K400CF672C8ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400CF672C9N | EP20K400CF672C8ES |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Series | EP20K400 | EP20K400 |
| Logic Elements | 16,640 | — |
| System Gates | 400,000 | — |
| Maximum Operating Frequency | 250 MHz | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| User I/O Pins | 502 | — |
| Total I/O Lines | 480 | — |
| Dedicated Inputs | 4 | — |
| Embedded Memory | 212,992 bits | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.18 µm all-layer copper CMOS | 0.15 µm CMOS |
| Packhaging | 672-ball FC-FBGA | 672-BGA FineLine (FC-FBGA / S-PBGA-B672) |
| Temperature na Operasyon | 0 °C to 85 °C (commercial) | 0°C to 85°C (Commercial) |
| Tindminan RoHS | Compliant | [DATA_NEEDED: not stated in verified data] |
| Logic Cells / Macros | — | 16,640 |
| System Gates (typical) | — | 400,000 |
| System Gates (maximum) | — | 212,992 [DATA_NEEDED: confirm datasheet interpretation] |
| Maximum User I/O | — | 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value] |
| Bidirectional I/O | — | 484 |
| Maximum Internal Frequency | — | 301.21 MHz |
| Nominal Supply Voltage | — | 1.8 V |
| Supply Voltage Range | — | 1.71 V to 1.89 V |
| Logic Family | — | CMOS |
| Architecture | — | MultiCore™ (LUT + Embedded System Block) |
| Programming Method | — | JTAG / in-system via configuration memory |