EP20K400CF672I7 vs EP20K400CF672C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CF672I7 sa pamamagitan ng Intel at EP20K400CF672C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400CF672I7 | EP20K400CF672C7 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC (MultiCore™) |
| Logic Elements | 16,640 | — |
| Maximum System Gates | 400,000 | — |
| Embedded Memory (ESB) | 212,992 bits | — |
| Maximum User I/O Pins | [DATA_NEEDED: pin count for CF672 package] | — |
| Process Technology | 0.15 um CMOS | 0.15 µm CMOS |
| Core Supply Voltage | 1.8 V | — |
| I/O Supply Voltage | 1.8 V / 3.3 V | — |
| PLL Count | 4 | 4 |
| Temperature na Operasyon | -40 C to +85 C (industrial) | 0 °C to +85 °C (Commercial, C-grade) |
| Speed Grade | I7 | -7 |
| Packhaging | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA) | 672-BBGA (FC-FBGA, FineLine BGA) |
| Terminal Finish | Tin/Lead (Sn/Pb) | — |
| JESD-609 Code | e0 | — |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | 3 | — |
| Configuration Mode | PS / AS / JTAG (IEEE 1149.1) | — |
| Series | — | APEX-20KC |
| Logic Elements / Cells | — | 16,640 |
| System Gates | — | 400,000 |
| Embedded Memory (RAM bits) | — | 212,992 |
| Maximum User I/O | — | 488 |
| Number of I/O Banks | — | 8 |
| Bilang ng Pin | — | 672 |
| Core Voltage | — | 1.8 V |
| Volte ng Pagbibigay | — | 2.5 V (I/O reference) |
| Propagation Delay (tPD) | — | 2.5 ns |
| Maximum Internal Frequency | — | 375.94 MHz |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |
| Tindminan RoHS | — | Non-compliant (legacy product) |
| Lead-Free | — | Contains lead (legacy BGA finish) |