EP20K400CF672I8N vs EP20K400CF672I8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CF672I8N sa pamamagitan ng Intel at EP20K400CF672I8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400CF672I8N | EP20K400CF672I8 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Series | APEX 20K | EP20K400 |
| Logic Cells | 16640 | — |
| System Gates | 400,000 | 400,000 |
| Maximum User I/O | 488 | — |
| Dedicated Inputs | 4 | — |
| Packhaging | 672-ball FC-FBGA | — |
| Pin / Ball Pitch | 1.0 mm | — |
| Core Voltage | 1.8 V nominal (1.71 V to 1.89 V) | — |
| Propagation Delay | 1.78 ns | — |
| Internal Operating Frequency | 301.21 MHz (max) | — |
| Fabrication Process | 0.15 µm all-layer copper-metal | — |
| Architecture | MultiCore (LUT + embedded memory) | — |
| Temperature na Operasyon | 0 °C to +85 °C (Industrial suffix I) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Uri ng Memory | Embedded System Blocks (ESB) | — |
| Pin Compatibility | Pin-compatible with APEX 20KE family | — |
| Manufacturer | — | Intel (formerly Altera) |
| Device Type | — | FPGA - Field Programmable Gate Array |
| Logic Elements / Cells | — | 16,640 |
| Embedded Memory (RAM bits) | — | 212,992 |
| Number of Logic Macros | — | 1664 |
| User I/O Pins | — | 488 |
| Supply Voltage - Core | — | 1.8 V |
| I/O Voltage (MultiVolt) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Maximum Internal Frequency | — | 301.21 MHz |
| Process Technology | — | 0.15 µm CMOS |
| Speed Grade | — | I8 |
| Package Type | — | 672-pin FC-FBGA (FineLine BGA) |
| Operating Temperature (Industrial) | — | -40 °C to +100 °C |
| Configuration Method | — | Passive Serial / Active Serial / JTAG (IEEE 1149.1) |
| PLLs | — | 4 |
| Level ng MSL | — | [DATA_NEEDED: MSL moisture sensitivity level] |