EP20K400EFC672-3N vs EP20K400EFC672-1N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400EFC672-3N sa pamamagitan ng Intel at EP20K400EFC672-1N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400EFC672-3N | EP20K400EFC672-1N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX 20KE | APEX 20KE |
| Series | APEX 20K | — |
| Device Type | FPGA - Field Programmable Gate Array | — |
| System Gates | 1,052,000 | 400,000 |
| Logic Elements | 16,640 | — |
| Logic Array Blocks (LABs) | 1,664 macros | — |
| Embedded RAM (EAB/ESB bits) | 212,992 bits | — |
| User I/O Pins | 488 | — |
| Packhaging | 672-BBGA (FC-FBGA) | 672-ball FC-FBGA |
| Bilang ng Pin | 672 | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| I/O Supply Voltage | 2.5 V | — |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0 °C to 85 °C (industrial) |
| Speed Grade | -3 | — |
| Technology | CMOS, 0.18 µm (per APEX 20KE family) | — |
| PLL Count | 4 | — |
| Architecture | MultiCore (LUT + Embedded System Blocks) | MultiCore (LUT + product-term + EAB) |
| Tindminan RoHS | [DATA_NEEDED: specific RoHS status - likely non-compliant given part age] | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 16,640 |
| User I/Os | — | 502 (488 per Mouser listing) |
| Process Technology | — | 0.22 µm CMOS |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V |
| Maximum Core Frequency | — | 368 MHz |
| PLLs | — | 4 |
| Configuration Interface | — | JTAG (IEEE 1149.1) |
| Uri ng Pagpapasok | — | Surface Mount |