EP20K400FC784-2 vs EP20K400FC784-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400FC784-2 sa pamamagitan ng Altera at EP20K400FC784-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400FC784-2 | EP20K400FC784-3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20K | APEX 20K (MultiCore) |
| Device Family Member | EP20K400C | — |
| Typical System Gates | 400,000 | — |
| Maximum User I/O Pins | 488 (784-BGA) | — |
| Logic Elements | 16,640 | 21,168 |
| Embedded RAM (ESB) | 212 Kbits | — |
| Maximum Block RAM | [DATA_NEEDED: block RAM organization per ESB] | — |
| Maximum Frequency (internal) | [DATA_NEEDED: fmax, datasheet-dependent] | — |
| Process Technology | 0.22 µm CMOS SRAM | 0.18 µm CMOS |
| Core Voltage | 2.5 V | [DATA_NEEDED: core voltage] |
| MultiVolt I/O Voltage | 1.8 V / 2.5 V / 3.3 V | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, SSTL-2, SSTL-3, GTL+, CTT | — |
| Configuration Mode | Serial / Parallel SRAM-volatile (external PROM required) | — |
| Packhaging | 784-Ball FineLine BGA (FC) | 784-ball FineLine BGA (FC) |
| Speed Grade | -2 (industrial) | -3 |
| Temperature na Operasyon | [DATA_NEEDED: exact Tj range] | Commercial (0°C to +85°C) |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Level ng MSL | 3 (per Partstack listing) | [DATA_NEEDED: MSL rating] |
| Peak Reflow Temperature | 220 °C (per Partstack listing) | — |
| Hot Socketing | Supported | — |
| JTAG / Boundary-Scan | IEEE 1149.1 compliant | — |
| Tindminan RoHS | [DATA_NEEDED: not confirmed in provided data] | [DATA_NEEDED: RoHS status] |
| Typical Gates | — | 400,000 |
| Maximum System Gates | — | 1,052,000 |
| Maximum RAM Bits | — | 212,992 |
| Embedded System Blocks (ESBs) | — | 100 |
| PLLs | — | 4 |
| User I/O Pins | — | 488 |
| I/O Standards | — | MultiVolt I/O: 1.8V, 2.5V, 3.3V, 5.0V |
| Configuration Method | — | Serial or parallel, SRAM-based |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |