EP20K400GC655-2 vs EP20K400GC655-2V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GC655-2 sa pamamagitan ng Altera at EP20K400GC655-2V sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K400GC655-2V - 400K Gate APEX-20KC FPGA 655-CPGA | Altera
EP20K400GC655-2V ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K400GC655-2 | EP20K400GC655-2V |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | APEX-20KC | APEX-20KC |
| Family | APEX 20K | APEX 20KC (1.8 V, LVDS) |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| System Gates | 400,000 | ~400,000 (typical marketing figure) |
| Logic Cells / Elements | 16,640 | — |
| Total RAM Bits | 212,992 | 212,992 |
| Maximum Internal Frequency | 200 MHz | — |
| Speed Grade | -2 | -2 |
| Process Technology | 0.22 µm CMOS | CMOS, 0.18 um |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 1.71 V to 1.89 V (MultiVolt) | — |
| LVDS Support | Yes | Yes |
| PLLs | 4 | — |
| Bilang ng Pin | 655 | — |
| Package Type | 655-BCPGA (CPGA-655) | Ceramic Pin Grid Array, through-hole |
| Package Dimensions | 62.48 x 62.48 mm | — |
| Uri ng Pagpapasok | Through-Hole (CPGA) | Through-hole (CPGA) |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: temperature grade] |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | unknown |
| Logic Elements | — | 16,640 |
| Number of I/O | — | [DATA_NEEDED: I/O count] |
| Core Voltage (VCCINT) | — | 2.375 V to 2.625 V (nominal 2.5 V) |
| Propagation Delay | — | 3.000 ns |
| Packhaging | — | 655-CPGA (62.48 x 62.48 mm) |
| Lead-Free | — | unknown |
| Architecture | — | MultiCore (LUT + product-term + embedded memory) |