EP20K600CB652C9N vs EP20K600CB652I8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CB652C9N sa pamamagitan ng Intel at EP20K600CB652I8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CB652C9N | EP20K600CB652I8 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Device Type | Loadable PLD (FPGA) | — |
| Typical Gates | 600,000 | — |
| Logic Elements | 24,320 | — |
| Maximum User I/O | 488 | — |
| Packhaging | BGA-652 (652-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch) | 652-ball FineLine BGA (S-PBGA-B652) |
| Process Technology | 0.15 micron all-layer copper CMOS | 0.15 µm CMOS |
| Core Supply Voltage | 1.8 V | — |
| Speed Grade | C9 (~1.48 ns propagation delay) | — |
| Architecture | MultiCore LUT + embedded system memory (ESB) | — |
| On-chip Memory | Embedded system memory blocks (dual-port RAM, FIFO) | — |
| Configuration Interface | JTAG (IEEE 1149.1) and serial/PROM configuration | — |
| Temperature na Operasyon | 0 C to 85 C (commercial) | -40 °C to +85 °C (Industrial) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Pin/Pin Compatibility | Pin-compatible with APEX 20KE devices of same package | — |
| Toolchain | Altera/Intel Quartus II (legacy APEX support) | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Series | — | EP20K600 |
| System Gates | — | 600,000 |
| Logic Elements / Cells | — | 24,320 |
| Maximum Operating Frequency | — | 301.21 MHz |
| Propagation Delay (tpd) | — | 1.78 ns (CMOS) |
| Core Supply Voltage (VCCINT) | — | 1.8 V nominal (1.71 V to 1.89 V) |
| Package Code | — | BGA, square |
| Ball Pitch | — | 1.27 mm |
| Package Body Size | — | 45 mm × 45 mm |
| User I/O Lines | — | 488 |
| Dedicated Clock Inputs | — | 4 |
| Programming Interface | — | IEEE 1149.1 JTAG (in-system) |