EP20K600CB652I7 vs EP20K600CB652I8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CB652I7 sa pamamagitan ng Intel at EP20K600CB652I8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CB652I7 | EP20K600CB652I8 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Manufacturer | Intel (formerly Altera) | — |
| Technology | 0.15 µm CMOS, SRAM-based | — |
| System Gates | 600,000 | 600,000 |
| Logic Elements | 24,320 | — |
| Maximum Internal Frequency | 375.94 MHz | — |
| Propagation Delay | 1.6 ns | — |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V range) | — |
| User I/O Count | 488 (4 dedicated inputs + 480 I/O) | — |
| Bilang ng Outputs | 480 | — |
| Packhaging | 652-ball FineLine BGA (LBGA, 1.27 mm pitch) | 652-ball FineLine BGA (S-PBGA-B652) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40 °C to +85 °C (industrial, 'I' suffix) | -40 °C to +85 °C (Industrial) |
| Speed Grade | -7 | — |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | IEEE 1149.1 JTAG (in-system) |
| Embedded Memory | ESBs configurable as dual-port RAM / ROM / CAM | — |
| MultiVolt I/O Support | 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant banks | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Series | — | EP20K600 |
| Logic Elements / Cells | — | 24,320 |
| Maximum Operating Frequency | — | 301.21 MHz |
| Propagation Delay (tpd) | — | 1.78 ns (CMOS) |
| Process Technology | — | 0.15 µm CMOS |
| Core Supply Voltage (VCCINT) | — | 1.8 V nominal (1.71 V to 1.89 V) |
| Package Code | — | BGA, square |
| Ball Pitch | — | 1.27 mm |
| Package Body Size | — | 45 mm × 45 mm |
| User I/O Lines | — | 488 |
| Dedicated Clock Inputs | — | 4 |