EP20K600CB652I7 vs EP20K600CF672I7 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CB652I7 sa pamamagitan ng Intel at EP20K600CF672I7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K600CB652I7 EP20K600CF672I7
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family APEX 20KC APEX 20KC
Manufacturer Intel (formerly Altera) —
Technology 0.15 µm CMOS, SRAM-based —
System Gates 600,000 600,000
Logic Elements 24,320 —
Maximum Internal Frequency 375.94 MHz 375.94 MHz
Propagation Delay 1.6 ns —
Core Supply Voltage 1.8 V (1.71 V to 1.89 V range) —
User I/O Count 488 (4 dedicated inputs + 480 I/O) —
Bilang ng Outputs 480 —
Packhaging 652-ball FineLine BGA (LBGA, 1.27 mm pitch) 672-ball FineLine BGA (FC-FBGA, 27×27 mm)
Uri ng Pagpapasok Surface Mount Surface Mount (BGA)
Temperature na Operasyon -40 °C to +85 °C (industrial, 'I' suffix) -40 °C to +100 °C (industrial, I-suffix)
Speed Grade -7 -7
Programming Interface JTAG (IEEE 1149.1), in-system programmable —
Embedded Memory ESBs configurable as dual-port RAM / ROM / CAM —
MultiVolt I/O Support 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant banks —
Tindminan RoHS unknown [DATA_NEEDED: RoHS compliance]
Maximum Logic Elements — 24,320 cells
Maximum User I/O — 508
Process Technology — 0.15 µm CMOS
Core Supply Voltage (VCCINT) — 1.8 V
I/O Supply Voltage (VCCIO) — 3.3 V (LVTTL/LVCMOS compatible)
Ball Pitch — 1.00 mm
Embedded System Blocks — Yes (dual-port RAM / CAM)
Configuration Interface — IEEE 1149.1 JTAG, passive serial, fast passive parallel

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