EP20K600CB652I7N vs EP20K600CB652I8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CB652I7N sa pamamagitan ng Altera at EP20K600CB652I8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CB652I7N | EP20K600CB652I8N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | APEX 20KC | APEX 20KC |
| Typical Gates | 600,000 | — |
| Logic Elements (Cells) | 24,320 | — |
| Maximum Operating Frequency | 375.94 MHz | 301.21 MHz |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| Packhaging | 652-pin FineLine BGA | 652-pin PBGA (S-PBGA-B652) |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| User I/O Banks | [DATA_NEEDED: User I/O Banks] | — |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O] | — |
| Embedded System Block (ESB) Memory | 311,040 bits | — |
| Phase-Locked Loops (PLLs) | 4 | — |
| Operating Temperature Grade | Industrial (-40C to +100C) | Industrial (-40 °C to +85 °C) |
| Speed Grade | 7 | — |
| Configuration Method | SRAM-based, JTAG (IEEE 1149.1) | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: lead-free/RoHS status] |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| System Gates | — | 600,000 |
| Logic Elements / Cells | — | 24,320 |
| Propagation Delay (typical) | — | 1.78 ns |
| User I/O Pins | — | 488 |
| Embedded Memory (ESB) | — | 311,296 bits |
| Supply Voltage (Core) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Package Size | — | 45 mm x 45 mm |
| Terminal Pitch | — | 1.27 mm |
| Configuration Interface | — | JTAG / Serial / ISP |