EP20K600CB652I9N vs EP20K600CB652C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CB652I9N sa pamamagitan ng Altera at EP20K600CB652C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K600CB652I9N - 600K APEX 20KC FPGA, 652-BGA, Industrial | Altera
EP20K600CB652I9N ObsoletePagsanggunian na paghahambing
| Parametro | EP20K600CB652I9N | EP20K600CB652C7N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 24,320 | 24,320 |
| System Gates | 600,000 | 600,000 |
| Maximum Operating Frequency | 250 MHz | — |
| Process Technology | 0.15 um CMOS | 0.15 um all-layer copper-metal |
| Core Voltage | 1.8 V | — |
| I/O Voltage | 3.3 V | — |
| Total I/O Pins | 488 | — |
| General-Purpose I/O | 480 | — |
| Dedicated Inputs | 4 | — |
| Packhaging | 652-BGA (PBGA652) | 652-ball BGA (PBGA-652, S-PBGA-B652) |
| Terminal Pitch | 1.27 mm | — |
| Temperature na Operasyon | -40C to +100C (Industrial) | 0 C to 85 C |
| Configuration Method | Passive Serial / Passive Parallel / JTAG | — |
| Embedded Memory | ESB (Embedded System Block) RAM / CAM | — |
| I/O Standards | LVDS, PCI, LVTTL, LVCMOS | — |
| Device Type | — | SPLD / Loadable PLD (FPGA) |
| Embedded Memory (bits) | — | 311,296 |
| Maximum User I/Os | — | 488 |
| Propagation Delay | — | 1.48 ns |
| Internal Operating Frequency | — | 375.94 MHz |
| Core Supply Voltage | — | 1.8 V |
| Package Dimensions | — | 45 x 45 mm |
| Ball Pitch | — | 1.27 mm |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |