EP20K600CF33C8 vs EP20K600CF33C8N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF33C8 sa pamamagitan ng Altera at EP20K600CF33C8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K600CF33C8 EP20K600CF33C8N
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Family APEX 20KC APEX 20KC
Device Type FPGA (Field Programmable Gate Array) —
Typical Gates 600,000 —
Logic Elements 24,320 —
Embedded RAM Bits 311,296 —
Embedded System Blocks (ESB) 152 —
Maximum User I/O 488 —
Process Technology 0.15 µm CMOS —
Core Voltage (VCCINT) 1.8 V —
I/O Voltage (VCCIO) 1.8 V / 2.5 V / 3.3 V (bank-selectable) —
LVDS Support Yes, up to 840 Mbps —
PLLs 4 enhanced PLLs —
Packhaging 1020-ball FineLine BGA (FC-FBGA), 33 x 33 mm 1020-pin FC-FBGA (flip-chip)
Speed Grade -8 -8 (slower than -7)
Temperature na Operasyon Commercial (0 °C to +85 °C) 0°C to 85°C (TJ)
Configuration Modes Passive Serial, Passive Parallel Asynchronous, Passive Parallel Synchronous, JTAG —
Tindminan RoHS Compliant (lead-free version) / non-compliant for legacy C-speed grade variant Compliant (N suffix)
Status NRND / Last-Time-Buy (per Altera/Intel product notice) —
Logic Elements / Cells — 24,320
Total RAM Bits — 311,296
Number of LABs / CLBs — 2,432
Number of Gates — 1,537,000 (max)
Number of I/O Banks — [DATA_NEEDED: number of I/O banks]
Core Voltage Supply — 1.71 V to 1.89 V (1.8 V nominal)
Technology / Process — 0.15 µm CMOS
Maximum Internal Frequency — 301.21 MHz
Pitch — 0.33 mm
Uri ng Pagpapasok — Surface Mount
Programmable Type — In-System / SRAM-based
Configuration Interface — JTAG (IEEE 1149.1) + Passive Serial / Parallel

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