EP20K600CF672-2 vs EP20K600CF672-3X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672-2 sa pamamagitan ng Intel at EP20K600CF672-3X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K600CF672-3X - 600K Gate APEX 20KC FPGA, F672, -3X Speed | Intel / Altera
EP20K600CF672-3X ObsoletePagsanggunian na paghahambing
| Parametro | EP20K600CF672-2 | EP20K600CF672-3X |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Manufacturer | Intel / Altera | — |
| Series | APEX 20KC | APEX 20KC |
| Device Family | APEX 20KC PLD | — |
| Gate Count (typical) | 600,000 gates | — |
| Logic Elements | 30,720 | 24,480 |
| Embedded RAM (approx.) | 311,232 bits | — |
| Process Technology | 0.18 um CMOS | 0.18 um CMOS, SRAM-based |
| Speed Grade | -2 | -3X (fastest) |
| Package Type | 672-ball FineLine BGA (FCBGA) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Temperature na Operasyon | 0 C to +60 C (TJ, per Alibaba supplier listing) | 0C to +85C (commercial) |
| Configuration Mode | Enhanced Configuration (EPC) | — |
| Number of PLLs | 4 | — |
| I/O Standards | LVTTL, LVCMOS, and others per datasheet | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| Tindminan RoHS | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: rohs status] |
| Katayuan ng Lifecycle | Obsolete / last-time-buy | — |
| Family | — | APEX 20K (MultiCore) |
| Typical Gates | — | 600,000 |
| Maximum System Gates | — | 1,537,000 |
| Embedded System Blocks (ESBs) | — | 312 |
| Maximum RAM Bits | — | 311,296 |
| Maximum User I/O Pins | — | 508 |
| PLLs | — | 4 |
| Packhaging | — | 672-pin FineLine BGA (F672) |
| Configuration Method | — | SRAM, serial/parallel, EPC support |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |