EP20K600CF672C7ES vs EP20K600CF672C-7ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672C7ES sa pamamagitan ng Altera at EP20K600CF672C-7ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera
EP20K600CF672C7ES ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K600CF672C7ES | EP20K600CF672C-7ES |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Series | APEX 20KC | — |
| Family | APEX 20K | APEX 20KC |
| Logic Elements / Cells | 24320 | — |
| System Gates | 600000 | — |
| Maximum User I/O | 504 | 488 |
| Maximum Input Lines | 508 | — |
| Number of Macrocells | 504 | — |
| Maximum Operating Frequency | 375.94 MHz (per FPGAkey listing) | — |
| Propagation Delay | 1.6 ns | 1.48 ns to 1.6 ns |
| Internal Reference Clock | 1666.6 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 micron all-layer copper CMOS |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| Package Type | FC-FBGA | — |
| Pin / Ball Count | 672 | — |
| Grade Suffix | ES (engineering sample / extended screening) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature grade] | 0 C to 85 C (Commercial) |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Configuration Memory | SRAM-based (volatile) | — |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Maximum System Gates | — | 1,560,000 (typical 600K application gates) |
| Typical Logic Elements | — | 24,320 (per APEX 20KC 600K family) |
| Total I/O Lines | — | 504 (per Microchip USA listing) |
| Total Inputs | — | 508 |
| Embedded System Blocks (ESBs) | — | 248 |
| Embedded RAM | — | 248 Kbits (dual-port) |
| PLLs | — | 4 |
| Maksimum na Taktiko ng Oras | — | 1666.6 MHz |
| Speed Grade | — | -7 |
| Packhaging | — | 672-ball FCBGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch |
| Core Voltage | — | 1.8 V (typical APEX 20KC, exact value per datasheet) |
| Configuration Mode | — | EPC serial / JTAG IEEE 1149.1 |
| Compliance | — | RoHS status unknown (verify with manufacturer datasheet) |