EP20K600CF672C7ES vs EP20K600CF672C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672C7ES sa pamamagitan ng Altera at EP20K600CF672C8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera
EP20K600CF672C7ES ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K600CF672C7ES | EP20K600CF672C8 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Unknown |
| Series | APEX 20KC | — |
| Family | APEX 20K | — |
| Logic Elements / Cells | 24320 | — |
| System Gates | 600000 | — |
| Maximum User I/O | 504 | — |
| Maximum Input Lines | 508 | — |
| Number of Macrocells | 504 | — |
| Maximum Operating Frequency | 375.94 MHz (per FPGAkey listing) | — |
| Propagation Delay | 1.6 ns | 1.48 ns |
| Internal Reference Clock | 1666.6 MHz | — |
| Process Technology | 0.15 µm CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| Package Type | FC-FBGA | FBGA |
| Pin / Ball Count | 672 | — |
| Grade Suffix | ES (engineering sample / extended screening) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature grade] | 0 C to 85 C |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | Non-compliant |
| Configuration Memory | SRAM-based (volatile) | — |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Product Family | — | APEX-20K |
| User I/O Count | — | 508 |
| Logic Elements | — | 24,320 |
| Total RAM Bits | — | 311,296 bits |
| Package Pin Count | — | 672 balls |
| Supplier Device Package | — | 672-FBGA, 27 mm x 27 mm |
| Alternate Package Description | — | BGA-652, 45 mm x 45 mm, 1.27 mm pitch |
| Volte ng Pagbibigay | — | 1.71 V to 1.89 V |
| Fabrication Process | — | 0.15 um |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| Configuration Interface | — | [DATA_NEEDED: configuration interface] |
| Maximum Core Frequency | — | [DATA_NEEDED: maximum core frequency] |