EP20K600CF672C7N vs EP20K600CF672I7N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672C7N sa pamamagitan ng Altera at EP20K600CF672I7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K600CF672C7N EP20K600CF672I7N
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Device Family APEX 20KC —
Maximum System Gates 1,052,000 600,000
Typical Gates 600,000 —
Logic Elements / Cells 24,320 —
Maximum User I/O Pins 488 508
Total Package Pins 652 —
Packhaging FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch 672-ball FineLine BGA (FC-FBGA)
Core Voltage 1.8 V —
Maximum Operating Frequency 375.94 MHz —
Propagation Delay 1.48 ns —
Process Technology 0.15 µm all-layer copper-metal CMOS —
Architecture MultiCore (LUT + Embedded System Memory) —
Temperature na Operasyon 0 °C to +85 °C (Commercial) —
Speed Grade C7 I7 (-40 °C to +100 °C industrial)
Seated Height 3.50 mm —
Uri ng Pagpapasok Surface Mount (BGA) —
Tindminan RoHS unknown [DATA_NEEDED: RoHS compliance]
Family — APEX 20KC
Technology — 0.15 µm CMOS
Logic Elements — 24,320
Maximum Internal Frequency — 376 MHz
Embedded System Blocks (ESBs) — 160
Total Embedded RAM (max) — 311,296 bits
Core Voltage (VCCINT) — 1.8 V
I/O Voltage (VCCIO) — 2.5 V / 3.3 V (MultiVolt, bank-dependent)
Ball Pitch — 1.0 mm
Package Body Size — 27 mm × 27 mm
Propagation Delay (typical) — 1.6 ns
Configuration Method — JTAG (IEEE 1149.1) + EPC configuration device
Lead-Free Finish (N suffix) — Yes

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita