EP20K600CF672C8 vs EP20K600CF672-1X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672C8 sa pamamagitan ng Intel at EP20K600CF672-1X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CF672C8 | EP20K600CF672-1X |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Unknown | NRND |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Product Family | APEX-20K | — |
| User I/O Count | 508 | — |
| Logic Elements | 24,320 | 31,104 (per Altera APEX 20KC datasheet family) |
| Total RAM Bits | 311,296 bits | — |
| Propagation Delay | 1.48 ns | — |
| Package Pin Count | 672 balls | — |
| Supplier Device Package | 672-FBGA, 27 mm x 27 mm | — |
| Alternate Package Description | BGA-652, 45 mm x 45 mm, 1.27 mm pitch | — |
| Package Type | FBGA | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Volte ng Pagbibigay | 1.71 V to 1.89 V | [DATA_NEEDED: VCCINT/VCCIO] |
| Temperature na Operasyon | 0 C to 85 C | [DATA_NEEDED: industrial temp range] |
| Fabrication Process | 0.15 um | — |
| Tindminan RoHS | Non-compliant | Compliant (per Alibaba distributor listing: "RoHS Compliant") |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Configuration Interface | [DATA_NEEDED: configuration interface] | — |
| Maximum Core Frequency | [DATA_NEEDED: maximum core frequency] | — |
| Series | — | APEX 20KC |
| Device Family | — | APEX 20KC MultiCore FPGA |
| Maximum Typical Gates | — | 600,000 |
| Embedded System Blocks (ESBs) | — | up to 256 |
| Embedded Memory (max bits) | — | [DATA_NEEDED: ESB RAM bits] |
| PLLs | — | 4 |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O count] |
| Packhaging | — | 672-ball BGA (CF672), 1.27 mm pitch |
| Speed Grade | — | -1 (industrial speed grade, X = lead-free) |
| Process Technology | — | 0.18 um SRAM CMOS |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1), EPC passive serial |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |