EP20K600CF672C8N vs EP20K600CF672I8ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672C8N sa pamamagitan ng Intel at EP20K600CF672I8ES sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K600CF672I8ES - APEX 20KC 600K Gates FPGA, 672-FBGA | Intel
EP20K600CF672I8ES ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K600CF672C8N | EP20K600CF672I8ES |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Device Type | SPLD | — |
| Product Type | FPGA / programmable logic device | — |
| Family | APEX 20KC | APEX 20KC |
| Nominal Gate Capacity | 600K gates | — |
| Logic Elements or Cells | 24,320 | — |
| Macros | 2,432 | — |
| User I/O Count | 508 | — |
| Package Terminals | 652 pins | — |
| Packhaging | BGA-652, 45 x 45 mm, 1.27 mm pitch | 672-ball FC-FBGA (FineLine) |
| Package Description | 672-pin FC-FBGA | — |
| Volte ng Pagbibigay | 1.8 V | — |
| Listed Frequency | 301.21 MHz | — |
| Propagation Delay | 1.48 ns | — |
| Fabrication Process | 0.15 µm | — |
| Temperature na Operasyon | 0°C to 85°C | -40 °C to +85 °C (Industrial, I-grade) |
| Interconnect Metal | All-layer copper metal | — |
| I/O Configuration | 508 user I/O | — |
| Uri ng Pagpapasok | Surface mount | Surface Mount |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS compliance] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Configuration Method | [DATA_NEEDED: configuration memory and programming method] | — |
| Core Current | [DATA_NEEDED: core supply current] | — |
| I/O Bank Voltage | [DATA_NEEDED: supported I/O voltage range] | — |
| Junction Temperature | [DATA_NEEDED: maximum junction temperature] | — |
| Thermal Resistance | [DATA_NEEDED: junction-to-ambient thermal resistance] | — |
| Logic Elements | — | 24,320 |
| Typical Gates | — | 600,000 |
| Maximum User I/O | — | 508 |
| Embedded Memory Bits | — | 311,296 |
| Process Technology | — | 0.18 µm CMOS (0.15 µm base) |
| Core Supply Voltage | — | 1.8 V |
| Maximum Internal Frequency | — | 301.21 MHz |
| PLLs (Phase-Locked Loops) | — | 4 |
| Configuration Scheme | — | FPP / PS |
| Speed Grade | — | 8 |
| Uri ng Memory | — | SRAM-based (volatile, requires configuration) |