EP20K600CF672I8AA vs EP20K600CF672C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672I8AA sa pamamagitan ng Intel at EP20K600CF672C7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CF672I8AA | EP20K600CF672C7N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Series | APEX 20KC | — |
| Logic Elements / Cells | 24,320 | 24,320 |
| Total Gates | 600,000 (system gates) | — |
| Total RAM Bits | 311,296 | — |
| Number of I/O | 508 | — |
| Number of LABs/CLBs | 1,520 | — |
| Volte ng Pagbibigay | 1.71 V to 1.89 V | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Packhaging | 672-FBGA (27 x 27 mm) | FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch |
| Temperature na Operasyon | -40C to +85C (industrial) | 0 °C to +85 °C (Commercial) |
| Technology | 0.15 um CMOS | — |
| I/O Standards | LVTTL, LVCMOS, PCI, GTL, SSTL-2/3, HSTL, LVDS, LVPECL | — |
| Number of PLLs | 4 | — |
| Speed Grade | I8 | C7 |
| Tindminan RoHS | Compliant | unknown |
| Lead Free | Yes | — |
| Number of Logic Array Blocks | 1,520 (40 LABs per MegaLAB) | — |
| Device Family | — | APEX 20KC |
| Maximum System Gates | — | 1,052,000 |
| Typical Gates | — | 600,000 |
| Maximum User I/O Pins | — | 488 |
| Total Package Pins | — | 652 |
| Core Voltage | — | 1.8 V |
| Maximum Operating Frequency | — | 375.94 MHz |
| Propagation Delay | — | 1.48 ns |
| Process Technology | — | 0.15 µm all-layer copper-metal CMOS |
| Architecture | — | MultiCore (LUT + Embedded System Memory) |
| Seated Height | — | 3.50 mm |