EP20K600CF672I9 vs EP20K600CF672C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672I9 sa pamamagitan ng Intel at EP20K600CF672C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CF672I9 | EP20K600CF672C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX-20KC |
| Logic Elements / Cells | 24,320 | — |
| System Gates | 600,000 | 600,000 |
| Maximum Operating Frequency | 250 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 um CMOS, all-layer copper |
| Core Voltage | 1.8 V | — |
| Packhaging | 672-pin FC-FBGA | 672-ball FC-FBGA (27x27 mm) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Temperature Grade | Industrial (-40°C to +85°C) | — |
| Speed Grade | 9 (fastest bin) | C7 |
| User I/O Pins | 311 (max) | — |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | — |
| Embedded Memory | [DATA_NEEDED: total RAM bits] | Dual-port RAM via ESBs |
| PLLs | Up to 4 | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, LVDS | — |
| Configuration Mode | Passive Serial / JTAG | — |
| Maximum Seated Height | 2.1 mm | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Lead-Free | [DATA_NEEDED: lead-free] | — |
| Device Type | — | SPLD / FPGA |
| Logic Cells | — | 24,320 |
| User I/O | — | 508 |
| Ball Pitch | — | 1.27 mm |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| Propagation Delay (typ.) | — | 1.48 ns |
| Temperature na Operasyon | — | 0C to 85C (commercial) |
| CAM Support | — | Yes (ESB-based content-addressable memory) |