EP20K600CF672I9N vs EP20K600CF672C8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672I9N sa pamamagitan ng Intel at EP20K600CF672C8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CF672I9N | EP20K600CF672C8N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 24,320 cells | — |
| Typical Gates | 600,000 | — |
| Maximum Frequency | 250 MHz | — |
| Process Technology | 0.15 µm CMOS | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | — |
| Embedded Memory | 311,040 bits (approx. 38 KB) | — |
| Packhaging | 672-ball FC-FBGA | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| User I/O Pins | [DATA_NEEDED: max user I/O] | — |
| Configuration Mode | JTAG / Serial / Parallel | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Temperature na Operasyon | -40 °C to +85 °C (industrial) | 0°C to 85°C |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Device Type | — | SPLD |
| Product Type | — | FPGA / programmable logic device |
| Nominal Gate Capacity | — | 600K gates |
| Logic Elements or Cells | — | 24,320 |
| Macros | — | 2,432 |
| User I/O Count | — | 508 |
| Package Terminals | — | 652 pins |
| Package Description | — | 672-pin FC-FBGA |
| Volte ng Pagbibigay | — | 1.8 V |
| Listed Frequency | — | 301.21 MHz |
| Propagation Delay | — | 1.48 ns |
| Fabrication Process | — | 0.15 µm |
| Interconnect Metal | — | All-layer copper metal |
| I/O Configuration | — | 508 user I/O |
| Uri ng Pagpapasok | — | Surface mount |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |
| Configuration Method | — | [DATA_NEEDED: configuration memory and programming method] |
| Core Current | — | [DATA_NEEDED: core supply current] |
| I/O Bank Voltage | — | [DATA_NEEDED: supported I/O voltage range] |
| Junction Temperature | — | [DATA_NEEDED: maximum junction temperature] |
| Thermal Resistance | — | [DATA_NEEDED: junction-to-ambient thermal resistance] |