EP20K600EBC652-2X vs EP20K600EBC652-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600EBC652-2X sa pamamagitan ng Altera at EP20K600EBC652-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600EBC652-2X | EP20K600EBC652-3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | APEX 20KE | — |
| Device Type | SPLD / FPGA (Field Programmable Gate Array) | FPGA (Field Programmable Gate Array) / SPLD Loadable |
| Logic Elements (LEs) | 24,320 | — |
| Macros | 24,320 | — |
| Embedded Memory Bits | 311,296 bits | — |
| User I/Os | 488 | 488 |
| Packhaging | 652-ball BGA, 45 x 45 mm, 1.27 mm pitch | — |
| Total Pins / Balls | 652 | — |
| Propagation Delay | 1.48 ns | 1.48 ns |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0 C to 85 C |
| Process Technology | 0.15 µm all-layer copper CMOS | 0.15-micron all-layer copper CMOS |
| Core Supply Voltage | 2.5 V | — |
| I/O Standard Support | LVTTL, LVCMOS, PCI, SSTL, GTL+ | — |
| Configuration Modes | Passive serial, passive parallel, JTAG (IEEE 1149.1) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Series | — | APEX-20KE |
| Family | — | APEX 20K |
| Logic Elements | — | 24320 |
| Embedded Memory | — | 311296 bits |
| Number of Terminals | — | 652 |
| Package Type | — | BGA-652 (45 x 45 mm, 1.27 mm pitch) |
| Speed Grade | — | -3 |
| Core Voltage | — | [DATA_NEEDED: core voltage] |
| I/O Voltage Support | — | Multi-volt 3.3 V / 2.5 V / 1.8 V |
| Configuration Method | — | JTAG / serial / passive parallel |
| PLLs | — | 4 |
| Lead-Free | — | [DATA_NEEDED: lead-free] |