EP20K600EFC144-2XN vs EP20K600CB652C8N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600EFC144-2XN sa pamamagitan ng Altera at EP20K600CB652C8N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K600EFC144-2XN EP20K600CB652C8N
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family APEX 20KE APEX 20KC
Logic Elements 24,576 24,320 cells
Typical Gates 600,000 —
Maximum System Gates 1,053,840 —
Embedded RAM Bits 311,040 bits (~38 KB) —
Number of ESBs (Embedded System Blocks) [DATA_NEEDED: ESB count] —
Number of Multiplier Blocks [DATA_NEEDED: multiplier count] —
Number of PLLs 4 —
Number of I/O Pins [DATA_NEEDED: usable I/O count] —
Core Voltage 1.8 V —
I/O Voltage Banks Multi-voltage (LVTTL/LVCMOS/PCI) —
Process Technology 0.18 um CMOS, 6-layer metal 0.18 µm all-layer copper-metal
Speed Grade -2 (mid-tier) C8
Packhaging 144-ball FineLine BGA 652-ball LBGA, 45 x 45 mm, 1.27 mm pitch
Temperature na Operasyon -40C to +85C (industrial, 'N' suffix) 0 °C to 85 °C (commercial)
Tindminan RoHS [DATA_NEEDED: RoHS] unknown
Configuration Method SRAM, IEEE 1532 / passive serial / passive parallel —
Device Type — Loadable PLD / FPGA
System Gates — 600,000
Embedded Memory — 311,296 bits
User I/O Pins — 488
Dedicated Inputs — 4
Outputs — 480
Propagation Delay (typ.) — 1.48 ns
Pin-to-Pin Timing — 1.78 ns
Internal Frequency (typ.) — 301.21 MHz
Core Supply Voltage — 1.8 V nominal (1.71 V to 1.89 V)
Uri ng Pagpapasok — Surface Mount (BGA)
Architecture — MultiCore LUT + Embedded System Blocks (ESB)
Pin-Compatible With — APEX 20KE family

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