EP20K600EFC672-1XN vs EP20K600CF672-1X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600EFC672-1XN sa pamamagitan ng Intel at EP20K600CF672-1X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600EFC672-1XN | EP20K600CF672-1X |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | APEX 20K (APEX-20KE) | — |
| System Gates | 1,560,000 (typical 600K) | — |
| Logic Elements | 24,320 | 31,104 (per Altera APEX 20KC datasheet family) |
| Typical Logic Elements | 311,296 | — |
| Macros (Logic Array Blocks) | 2,432 | — |
| User I/O Pins | 508 | — |
| Total RAM Bits | [DATA_NEEDED: total RAM bits] | — |
| Packhaging | 672-ball FineLine BGA (FBGA) | 672-ball BGA (CF672), 1.27 mm pitch |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 0.18 micron CMOS | 0.18 um SRAM CMOS |
| Supply Voltage (Core) | 1.8 V typical | — |
| Temperature na Operasyon | 0C to 85C (commercial) | [DATA_NEEDED: industrial temp range] |
| Speed Grade | -1 (fastest) | -1 (industrial speed grade, X = lead-free) |
| Configuration Method | Serial or parallel, JTAG | SRAM, JTAG (IEEE 1149.1), EPC passive serial |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant (per Alibaba distributor listing: "RoHS Compliant") |
| Series | — | APEX 20KC |
| Device Family | — | APEX 20KC MultiCore FPGA |
| Maximum Typical Gates | — | 600,000 |
| Embedded System Blocks (ESBs) | — | up to 256 |
| Embedded Memory (max bits) | — | [DATA_NEEDED: ESB RAM bits] |
| PLLs | — | 4 |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O count] |
| Volte ng Pagbibigay | — | [DATA_NEEDED: VCCINT/VCCIO] |