EP20K600EFC672-2X vs EP20K600EBC652-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600EFC672-2X sa pamamagitan ng Intel at EP20K600EBC652-2X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600EFC672-2X | EP20K600EBC652-2X |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KE | — |
| Typical Gates | 600,000 | — |
| Logic Elements / Cells | 24,320 | — |
| Embedded Memory Bits | 311,296 | 311,296 bits |
| Maximum User I/O | 508 | — |
| Number of PLLs | 4 | — |
| Package Type | 672-pin FineLine BGA (FC-FBGA) | — |
| Package Size | 45 x 45 mm, 1.27 mm pitch | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.15 µm all-layer copper CMOS | 0.15 µm all-layer copper CMOS |
| Propagation Delay (typical) | 1.48 ns | — |
| Maximum Internal Frequency | 200 MHz | — |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (commercial) |
| Lead-Free Variant | EP20K600EFC672-2N | — |
| Tindminan RoHS | Not RoHS compliant (X suffix is SnPb); use -2N suffix for lead-free | [DATA_NEEDED: RoHS status] |
| Configuration Method | Serial / Parallel (Quartus-supported) | — |
| Device Family | — | APEX 20KE |
| Device Type | — | SPLD / FPGA (Field Programmable Gate Array) |
| Logic Elements (LEs) | — | 24,320 |
| Macros | — | 24,320 |
| User I/Os | — | 488 |
| Packhaging | — | 652-ball BGA, 45 x 45 mm, 1.27 mm pitch |
| Total Pins / Balls | — | 652 |
| Propagation Delay | — | 1.48 ns |
| Core Supply Voltage | — | 2.5 V |
| I/O Standard Support | — | LVTTL, LVCMOS, PCI, SSTL, GTL+ |
| Configuration Modes | — | Passive serial, passive parallel, JTAG (IEEE 1149.1) |
| Uri ng Pagpapasok | — | Surface Mount |