EP20K60EFC144-1 vs EP20K30EFC144-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K60EFC144-1 sa pamamagitan ng Altera at EP20K30EFC144-3 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K60EFC144-1 | EP20K30EFC144-3 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | APEX 20KE | — |
| Series | APEX 20K | APEX-20K |
| Logic Family | CMOS | CMOS |
| Typical Gates | 60,000 | — |
| Maximum System Gates | 256,000 | — |
| Macrocells | 256 | — |
| Maximum User I/Os | 93 (per datasheet; 196 max in 144-FBGA family datasheet) | — |
| Embedded Memory | 32,768 bits (2560 RAM blocks) | — |
| Maximum Internal Frequency | 160 MHz | — |
| Propagation Delay | 1.72 ns | 1.68 ns (typical) |
| Core Supply Voltage | 1.8 V | 1.71 V to 1.89 V |
| Speed Grade | -1 | -3 |
| Temperature na Operasyon | 0 C to 85 C (Commercial) | 0C to +85C |
| Packhaging | 144-FBGA (Fine-pitch BGA) | — |
| Package Pin Count | 144 balls | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: RoHS status] |
| Programming Interface | JTAG / ByteBlaster / Altera Programming Unit | — |
| Family | — | APEX-20K FPGA |
| Logic Elements / Cells | — | 1200 |
| Total System Gates | — | 30,000 (typical) |
| Total RAM Bits | — | 24576 |
| Number of User I/Os (per pkg) | — | 92 (144-LQFP) |
| User I/Os (max per family) | — | 408 |
| Internal Operating Frequency | — | 160 MHz |
| Process Technology | — | 0.22 um |
| Architecture | — | MultiCore (LUT + product-term + ESB) |
| Packhaging / Kaso | — | 144-LQFP (20x20 mm) |
| Development Tool (legacy) | — | Quartus II / MAX+PLUS II |