EP20K60EFC324-1 vs EP20K100EFC324-1N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K60EFC324-1 sa pamamagitan ng Altera at EP20K100EFC324-1N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K60EFC324-1 | EP20K100EFC324-1N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX-20KE® | — |
| Family | APEX 20K (Enhanced) | APEX-20KE |
| Logic Elements / Cells | 2560 | — |
| Total Gates | 60,000 (typical) | — |
| Total RAM Bits | 32768 | — |
| Number of I/O | 196 | — |
| Number of Logic Blocks/Elements | 2560 | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Process Technology | 0.22 µm CMOS | 0.15 µm all-layer copper CMOS |
| Maximum Operating Frequency | 250 MHz | — |
| Speed Grade | -1 | — |
| Packhaging / Kaso | 324-FBGA (FineLine BGA, 19x19 mm) | — |
| Supplier Device Package | 324-FBGA (19x19) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0 C to 85 C |
| Tindminan RoHS | Non-compliant (legacy) | — |
| Lead Free Status | Contains lead (legacy) | — |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Elements (LEs) | — | 4160 |
| Typical Gates | — | 100,000 |
| Maximum User I/O | — | 246 |
| Embedded System Blocks (ESBs) | — | 53248 bits |
| Packhaging | — | 324-BGA (FineLine BGA) |
| Propagation Delay | — | 1.6 ns |
| Internal Operating Frequency | — | 250 MHz |
| Core Voltage | — | 1.8 V |
| I/O Standard Support | — | LVDS, SSTL, HSTL, LVTTL, LVCMOS |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Programming Technology | — | SRAM-based (volatile, requires configuration device) |
| MultiVolt I/O | — | 1.8 V core with 3.3 V / 5.0 V I/O support |