EP2A15B724C7 vs EP2A15F672C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A15B724C7 sa pamamagitan ng Altera at EP2A15F672C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A15B724C7 | EP2A15F672C7 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II | APEX II FPGA |
| Manufacturer | Altera (acquired by Intel) | — |
| System Gates | 600,000 | — |
| Logic Elements / Cells | 16,640 | — |
| Total RAM Bits | 425,984 | — |
| Number of I/O | 492 | — |
| Core Voltage | 1.425 V to 1.575 V | 1.5 V |
| Temperature na Operasyon | 0 C to 85 C (TJ) | Commercial (0°C to +85°C) |
| Packhaging | 724-BBGA, FCBGA (35 mm x 35 mm) | 672-ball FineLine BGA (FCBGA) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Speed Grade | C7 (per part suffix) | C7 |
| Maximum Internal Frequency | 500 MHz | — |
| Process Technology | 0.15 um all-layer copper | 0.15 µm all-layer copper, up to 8 metal layers |
| LVDS Support | True-LVDS up to 1 Gbps | — |
| Interface Standards | True-LVDS, LVPECL, PCML, HyperTransport | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Series | — | APEX II (EP2A15) |
| Logic Elements (LE) | — | 16,640 |
| Total System Gates | — | 425,984 |
| Maximum User I/O | — | 492 |
| Embedded Memory Bits | — | 425,984 |
| Number of Macrocells / Logic Units | — | 16,640 |
| Propagation Delay (tPD) | — | 1.69 ns |
| High-Speed I/O Standard | — | True-LVDS, LVPECL, PCML, HyperTransport |
| True-LVDS Data Rate | — | 1 Gbps |
| Package Dimensions | — | 27 mm × 27 mm, 1.0 mm pitch |