EP2A15F672C7N vs EP2A15F672C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A15F672C7N sa pamamagitan ng Intel at EP2A15F672C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A15F672C7N | EP2A15F672C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II | APEX II FPGA |
| Logic Elements (Cells) | 16,640 | — |
| Embedded Memory Bits | 425,984 | 425,984 |
| User I/Os | 492 | — |
| Process Technology | 0.15 µm all-layer copper CMOS | 0.15 µm all-layer copper, up to 8 metal layers |
| Metal Layers | Up to 8 | — |
| Core Voltage | 1.5 V | 1.5 V |
| Maximum Internal Frequency | 500 MHz | — |
| Speed Grade | -7 | C7 |
| Packhaging | 672-ball FC-FBGA (FineLine BGA) | 672-ball FineLine BGA (FCBGA) |
| Temperature na Operasyon | Commercial (0C to +85C) | Commercial (0°C to +85°C) |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL | — |
| LVDS Data Rate | Up to 1 Gbps (True-LVDS) | — |
| Configuration Methods | JTAG, Passive Serial | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Series | — | APEX II (EP2A15) |
| Logic Elements (LE) | — | 16,640 |
| Total System Gates | — | 425,984 |
| Maximum User I/O | — | 492 |
| Number of Macrocells / Logic Units | — | 16,640 |
| Propagation Delay (tPD) | — | 1.69 ns |
| High-Speed I/O Standard | — | True-LVDS, LVPECL, PCML, HyperTransport |
| True-LVDS Data Rate | — | 1 Gbps |
| Package Dimensions | — | 27 mm × 27 mm, 1.0 mm pitch |